1. Field of the Invention
The present invention relates to packaging processes, and more particularly, to an electronic package and a fabrication method thereof so as to improve the process yield.
2. Description of Related Art
Through molding via (TMV) technology has been widely applied in semiconductor fields, which mainly involves forming via holes on a surface of an encapsulant by laser drilling so as to increase routing space. For example, a fan-out package on package (PoP) structure can be achieved by using TMV technology.
FIGS. 1A to 1F are schematic cross-sectional views showing a method for fabricating an electronic package 1 of a fan-out PoP structure according to the prior art.
Referring to FIG. 1A, an electronic element 10 such as a chip is disposed on a release layer 180 of a first carrier 18, and then an insulating layer 11 is formed on the release layer 180 to cover the electronic element 10.
Referring to FIG. 1B, a second carrier 19 having a copper foil 190 is disposed on the insulating layer 11.
Referring to FIG. 1C, the first carrier 18 and the release layer 180 are removed to expose the electronic element 10 and the insulating layer 11.
Referring to FIG. 1D, a plurality of through holes 110 are formed by laser drilling in the insulating layer 11 around a periphery of the electronic element 10.
Referring to FIG. 1E, a copper electroplating process is performed to form a plurality of conductive posts 12 in the through holes 110. Then, a plurality of redistribution layers (RDLs) 13 are formed on the insulating layer 11 and electrically connected to the conductive posts 12 and the electronic element 10.
Referring to FIG. 1F, the second carrier 19 is removed and a patterning process is performed on the copper foil 190 to form a circuit structure 15. Then, a singulation process is performed.
As the electronic element 10 is developed toward miniaturization and high function, the thickness of the insulating layer 11 needs to be increased so as to increase the reliability of the electronic package 1.
However, to enable the above-described laser drilling process and the electroplating process for forming the conductive posts 12 to match one another, the aspect ratio (depth/width) of the through holes 110 must be less than 1.25. Therefore, an increase in thickness of the insulating layer 11 may greatly affect the above-described processes. In particular, if the thickness of the insulating layer 11 is increased (i.e., the depth H of the through holes 110 is increased), to keep the aspect ratio of the through holes 110 less than 1.25, the width D of the through holes 110 must be increased (as shown in dashed lines in FIG. 1D). As such, the electronic package 1 cannot meet the fine pitch requirement. On the other hand, if the aspect ratio in laser drilling is increased to 1.5, the bottom of the through hole 110′ cannot be completely filled with copper through the electroplating process (i.e., an unplated area 12′ is formed), as shown in FIG. 1E′, thus adversely affecting the process yield and increasing the fabrication cost.
Further, during formation of the through holes 110 through the laser drilling process, residue (generated from such as the insulating layer 11) easily accumulates on the bottom of the through holes 110. The residue must be removed first before formation of the conductive posts 12 in the through holes 110. Otherwise, the residue may adversely affect the electrical transmission performance of the conductive posts 110. However, if the thickness of the insulating layer 11 is increased, i.e., the depth H of the through holes 110 is increased, it will become difficult to completely remove the residue in the through holes 110. As such, the electrical transmission performance of the conductive posts 110 may be adversely affected by the remaining residue.
Therefore, there is a need to provide an electronic package and a fabrication method thereof so as to overcome the above-described drawbacks.